About this Journal Submit a Manuscript Table of Contents
VLSI Design
Volume 12 (2001), Issue 4, Pages 501-513
http://dx.doi.org/10.1155/2001/79703

Effect of Reverse Body Bias on Current Testing of 0.18 μm Gates

Electrical Engineering Department, Santa Clara University, 500 El Camino Real, Santa Clara 95053-0583, CA, USA

Received 15 August 1999; Revised 11 September 2000

Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

Systematic investigations on defect-free IDDQ in deep submicron CMOS with reverse body bias were performed by SPICE simulation towards an attempt to improve resolution of IDDQ measurement. Effects of reverse body bias on off-state leakage of scaled CMOS devices and IDDQ of typical CMOS circuit cells were investigated. It was found that reverse body bias can effectively reduce defect-free IDDQ of typical 0.18 μm technology devices and logic gates while the faulty current is not as much reduced. The reduction in defect-free IDDQ was enhanced as the device temperature went up and diminishes as the temperature went down. Further investigation showed that reverse body bias also makes the defect-free IDDQ less sensitive to the input state; therefore, a single IDDQ current threshold might still be used for IDDQ testing of 0.18 μm CMOS circuits. It was found that there might exist an optimal reverse body bias that minimized the defect-free IDDQ current. The optimal reverse bias value decreases as the temperature went down and might vary from circuit to circuit, process to process, and technology generation to generation.