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VLSI Design
Volume 12 (2001), Issue 3, Pages 317-331
http://dx.doi.org/10.1155/2001/90464

Low Power Design for ASIC Cores

1lBM Microelectronics, Essex Junction, 05452, VT, USA
2ECE Dept., University of Virginia, Charlottesville 22903, VA, USA

Received 20 June 2000; Revised 3 August 2000

Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

A semicustom ASIC design methodology is used to develop a low power DSP core for mobile (battery powered) applications. Different low power design techniques are used, including dual voltage, low power library elements, accurate power reporting, pseudomicrocode, transition-once logic, clock gating, and others.