VLSI Design
Volume 2007 (2007), Article ID 28686, 10 pages
doi:10.1155/2007/28686
Research Article
On SPARC LEON-2 ISA Extensions Experiments for MPEG Encoding Acceleration
TIMA Laboratory, 46 Avenu Félix Viallet, Grenoble Cedex 38031, France
Received 31 October 2006; Revised 19 January 2007; Accepted 30 May 2007
Recommended by Wieslaw Kuzmicz
Abstract
This paper presents the necessary steps to modify the implementation of the
SPARCV8 architecture to enhance it with multimedia-oriented instructions. The purpose
is improving video compression performance without designing dedicated
coprocessors. We investigate the complexity of modifying a standard processor instruction
set and show that, although not trivial, this is feasible in a few weeks. We
implemented 12 new instructions and use some of them to optimize the computation
of a demanding step of the MPEG encoding. The result is a performance increase of
67% in the execution of a part of this algorithm, allowing us to expect a 30% speedup in
the execution of an MPEG video compression. The area increase of the integer unit is about
18% and the clock frequency is not significantly modified in an LEON-2 implementing 6 among
12 of the new instructions.