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VLSI Design
Volume 2007 (2007), Article ID 94676, 13 pages
http://dx.doi.org/10.1155/2007/94676
Research Article

Online Reconfigurable Self-Timed Links for Fault Tolerant NoC

1Turku Centre for Computer Science (TUCS), Joukahaisenkatu 3–5 B, Turku 20520, Finland
2Department of Information Technology, University of Turku, Turku 20014, Finland
3Research Council for Natural Sciences and Engineering, Academy of Finland, Helsinki 00501, Finland

Received 15 October 2006; Accepted 4 March 2007

Academic Editor: Davide Bertozzi

Copyright © 2007 Teijo Lehtonen et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

We propose link structures for NoC that have properties for tolerating efficiently transient, intermittent, and permanent errors. This is a necessary step to be taken in order to implement reliable systems in future nanoscale technologies. The protection against transient errors is realized using Hamming coding and interleaving for error detection and retransmission as the recovery method. We introduce two approaches for tackling the intermittent and permanent errors. In the first approach, spare wires are introduced together with reconfiguration circuitry. The other approach uses time redundancy, the transmission is split into two parts, where the data is doubled. In both structures the presence of permanent or intermittent errors is monitored by analyzing previous error syndromes. The links are based on self-timed signaling in which the handshake signals are protected using triple modular redundancy. We present the structures, operation, and designs for the different components of the links. The fault tolerance properties are analyzed using a fault model containing temporary, intermittent, and permanent faults that occur both as bursts and as single faults. The results show a considerable enhancement in the fault tolerance at the cost of performance and area, and with only a slight increase in power consumption.