Department of Electrical Engineering, National Sun Yat-Sen University, 70 Lian-Hai Road, Kaohsiung 80424, Taiwan
Copyright © 2008 Tzung-Je Lee and Chua-Chin Wang. This is an open access article distributed under the
Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
How to Cite this Article
Tzung-Je Lee and Chua-Chin Wang, “A Phase-Locked Loop with 30% Jitter Reduction Using Separate Regulators,” VLSI Design, vol. 2008, Article ID 512946, 8 pages, 2008. doi:10.1155/2008/512946