]>Device and Circuit Design Challenges in the Digital Subthreshold Region for Ultralow-Power Applications : Figure 3
283702.fig.003a
(a)
283702.fig.003b
(b)
Figure 3: (a) Change in 𝐶 g and S with 𝑇 o x [12]. (b) Change in 𝐸 d y n with 𝑇 o x [12].