Table 8:
Sub-CMOS versus Subdomino logic [
22
].
Parameter
Sub-CMOS
Subdomino
Power (nw)
10.64
3.408 (32%)
Delay (
𝜇
s)
7.545
2.423 (3
×
faster)
PDP (fJ)
80.28
8.26 (10%)
Area (
𝜇
m
2
)
2381
1447 (60%)
Noise margins
poor
excellent