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VLSI Design
/
2009
/
Article
/
Tab 3
/
Research Article
Networks-On-Chip Based on Dynamic Wormhole Packet Identity Mapping Management
Table 3
Logic synthesis of router prototypes with adaptive routing algorithms (flit size: 32 + 6 bits, FIFO depth: 4).
Router's routing Alg.
WF
OE
EL
NF
Num. of logic cells
7149
7132
7119
7206
Total cell area (
)
0.1058
0.1057
0.1054
0.1064