FPGA Implementation of an Amplitude-Modulated Continuous-Wave Ultrasonic Ranger Using Restructured Phase-Locking Scheme

<table>(a) Block diagram realization of the Moving Averager and (b) pole-zero diagram of Moving Averager.</table>

VLSI Design

Figure 5: FPGA Implementation of an Amplitude-Modulated Continuous-Wave Ultrasonic Ranger Using Restructured Phase-Locking Scheme 