Table 2: Hardware resource utilization and logic blocks of the entire range measurement algorithm.

FPGA: Cyclone-II
Device: EP2C8T144C8

Total logic elements: 4,659/8,256 (56%)

Combinational with no register4148
Register only1
Combinational with a register510

Total registers: 511/8256 (6%)

LC registers511

Embedded multiplier 9-bit elements: 36/36 (100%)

DSP elements36
DSP 9 × 90
DSP 18 × 1818

Total pins: 62/85 (72%)

Total memory bits: 20,320/165,888 (12%)