VLSI Design
Volume 2010 (2010), Article ID 264390, 17 pages
doi:10.1155/2010/264390
Research Article

Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits

Tooraj Nikoubin,1 Poona Bahrebar,2 Sara Pouri,2 Keivan Navi,2 and Vaez Iravani2

1Faculty of Electrical and Computer Engineering, Shahid Beheshti University, GC, 1983963113, Tehran, Iran
2Microlectronic Laboratory of Faculty of Electrical and Computer Engineering, Shahid Beheshti University, GC, 1983963113, Tehran, Iran

Received 23 May 2009; Revised 8 October 2009; Accepted 21 January 2010

Academic Editor: Wieslaw Kuzmicz

Copyright © 2010 Tooraj Nikoubin et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Tooraj Nikoubin, Poona Bahrebar, Sara Pouri, Keivan Navi, and Vaez Iravani, “Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits,” VLSI Design, vol. 2010, Article ID 264390, 17 pages, 2010. doi:10.1155/2010/264390