Journals
Publish with us
Publishing partnerships
About us
Blog
VLSI Design
Table of Contents
Special Issues
VLSI Design
/
2010
/
Article
/
Fig 9
/
Research Article
Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits
Figure 9
Power, Delay, and Power-Delay Product (PDP) comparison of full adders versus power supply using Chang’s algorithm.
(a)
(b)
(c)