Emerging Carbon Nanotube Electronic Circuits, Modeling, and Performance

Abstract

Current transport and dynamic models of carbon nanotube field-effect transistors are presented. A model of single-walled carbon nanotube as interconnect is also presented and extended in modeling of single-walled carbon nanotube bundles. These models are applied in studying the performances of circuits such as the complementary carbon nanotube inverter pair and carbon nanotube as interconnect. Cadence/Spectre simulations show that carbon nanotube field-effect transistor circuits can operate at upper GHz frequencies. Carbon nanotube interconnects give smaller delay than copper interconnects used in nanometer CMOS VLSI circuits.

1. Introduction

A good amount of work on modeling carbon nanotube field-effect transistors (CNT-FETs) has been reported [1–4]. However, these models are numerical-based and require a mathematical/software realization. Recently, Srivastava et al. [5, 6] have obtained an analytical solution of current transport model for the CNT-FET for analysis and design of CNT-FET-based integrated circuits. Based on their work, a dynamic model [7, 8] for CNT-FETs is obtained and Verilog-AMS language [9] is used to predict static and dynamic characteristics of CNT-FETs and integrated circuits. Verilog-AMS requires less computational steps and easy to experiment with the developing model equations. In our work, we have used Verilog-AMS to describe the CNT-FET static and dynamic models and simulated CNT-FET circuits using Cadence/Spectre.

Fetter [10, 11] and Maffucci et al. [12] have investigated electron transport along the CNT and proposed a two-dimensional fluid model. In this model [10–12], electron-electron correlation, which is significant in CNT, has not been considered. In a recent work, we have made modification in two-dimensional fluid model to include electron-electron repulsive interaction and built a semiclassical one-dimensional fluid model [13], which is relatively easy to solve and apply in CNT transmission line modeling. We have also proposed circuit models for single-walled carbon nanotubes (SWCNTs) bundles as interconnects based on the one-dimensional fluid model.

2. CNT-FET Model

2.1. Static Model

The structure of a CNT-FET shown in Figure 1 [2] is similar to the structure of a typical MOSFET, where an SWCNT forms the channel between two electrodes, which work as the source and drain of the transistor. The structure is built on top of an insulating layer and a substrate which works as the back gate. The top gate is metal over the thin gate oxide. Current transport equations in a CNT-FET are developed in [5, 6] which are described here as follows and include both drift current and diffusion currents:𝐼_ds=𝐼_drift+𝐼_diff=+𝛽𝛽𝑓𝑓_driftdiffΨ_cnt,𝑠(𝐿),𝑉_gs−𝑓_driftΨ_cnt,𝑠(0),𝑉_gsΨ_cnt,𝑠(𝐿),𝑉_gs−𝑓_diffΨ_cnt,𝑠(0),𝑉_gs,(1) where𝑓_drift𝜓_cnt,𝑠(𝑥),𝑉_gs=𝑉_gs+𝑉_sb−𝑉_fb𝜓_cnt,𝑠(𝑥)−12𝜓^2cnt,𝑠𝑓(𝑥),_diff𝜓_cnt,𝑠(𝑥),𝑉_gs𝛽==𝑘𝑞𝛾𝑇𝜇𝜓𝐶_cnt,𝑠ox1(𝑥),𝐿².(2)

Figure 1 

Plot of the vertical cross-section of a CNT-FET [2].

In (1), various parameters are defined as follows: we have L: gate length, 𝜇: carrier mobility, k: Boltzmann constant, T: temperature,^∘K,𝑉_fb: flat-band voltage, 𝑉_gs: gate-source voltage, 𝑉_sb: source-substrate voltage, 𝜓_cnt,𝑠: surface potential of CNT, and 𝐶_ox1: gate-oxide capacitance per unit area. For a carbon nanotube of length L and radius 𝑟 in a CNT-FET, the oxide capacitance is given by [14]𝐶_ox1=2𝜋𝜀^ox1𝐿ln𝑇_ox1+𝑟+𝑇²_ox1+2𝑇_ox1𝑟/𝑟.(3)

In (3), 𝑇_ox1 is the thickness of the gate oxide and r is the radius of the CNT. Equation (1) is modified to incorporate channel length modulation through the parameter 𝜆 as in a MOSFET. In saturation region, modified equation (1) is described as follows [6]: 𝐼_ds=𝛽𝑓𝜓_cnt,𝑠(𝐿),𝑉_gs−𝑓𝜓_cnt,𝑠(0),𝑉_gs1+𝜆𝑉_ds.(4)

2.2. Dynamic Model

The dynamic response of a CNT-FET can be modeled using Meyer capacitance model [7, 8, 15, 16] as shown in Figure 2. Recently, we have obtained capacitances: 𝐶_gs,𝐶_gd, and 𝐶_gb based on current transport modeling of CNT-FETs described by (1), which are as follows [7, 8].

Figure 2 

Meyer capacitance model for CNT-FETs.

In linear region,𝐶𝐶_gb=0,_gs=−𝛾𝜇𝑊||𝐶^ℎ||C^2_ox1⋅2𝛽𝛿𝐼𝑒₋₁−𝛿Δℭ−𝑉_gs𝛿𝐼𝑒⁻¹−𝛿Δℭ−(1/2)𝑉_gd−(1/2)𝑉_gs²×𝛿𝐼𝑒⁻¹−𝛿Δℭ−(2/3)𝑉_gd−(1/3)𝑉_gs𝛿𝐼𝑒⁻¹−𝛿Δℭ−(1/2)𝑉_gd−(1/2)𝑉_gs²𝐶_gd,=−𝛾𝜇𝑊||𝐶^ℎ||C^2_ox1⋅2𝛽𝛿𝐼𝑒₋₁−𝛿Δ𝔄−𝑉_gs𝛿𝐼𝑒⁻¹−𝛿Δ(ℭ−(1/2)𝑉_gd−(1/2)𝑉_gs)²×𝛿𝐼𝑒⁻¹−𝛿Δ𝔄−(1/3)𝑉_gd−(2/3)𝑉_gs𝛿𝐼𝑒⁻¹−𝛿Δℭ−(1/2)𝑉_gd−(1/2)𝑉_gs²,(5) where ℭ denotes 𝜙₀−(Δ𝐸_𝐹/𝑞)+(𝐸_𝑐/𝑞)−(𝑘𝑇/𝑞)+𝑉_fb, 𝔄 denotes 𝜙₀−(Δ𝐸_𝑐/𝑞)+(𝐸_𝑐/𝑞)−(𝑘𝑇/𝑞)+𝑉_fb. In saturation region,𝐶𝐶_gb=0,_gs=13𝛾𝜇𝑊||𝐶^ℎ||𝐶^2_ox1𝐶_gd𝛽,=0.(6)

Considering 𝐶_sb and 𝐶_db to be equal to one half the insulator capacitance, 𝐶_ox2/2 in series with the depletion-layer capacitance, 𝐶_subs/2 [17, 18], we obtain𝐶_ox2=2𝜋𝜀^ox2𝐿𝐶ln𝑇_ox1+𝑟+𝑇²_ox2+2𝑇_ox2𝑟/𝑟_subs,=𝑁^𝐴𝑞𝜀_𝑠+4𝐶√_ox2𝑉_gb−𝜙_ms−𝜓_cnt𝑁_𝐴𝑞𝜀_𝑠8𝐶²_ox2𝑉_gb+𝑁_𝐴𝑞𝜀_𝑠−8𝐶²_ox2𝜙_ms−8𝐶²_ox2𝜓_cnt4𝐶_ox2𝑉_gb−𝜙_ms−𝜓_cnt,(7) where 𝜀_𝑠 is the permittivity of the semiconductor, 𝑊_𝑠 is the depletion region width, and 𝑁_𝐴 is the doping concentration.

3. SWCNT Interconnect Model

Figure 3 shows the geometry of an SWCNT interconnect. Based on two-dimensional fluid model developed by Maffucci et al. [12] we have proposed one-dimensional fluid model to describe the electron transport in metallic CNT and built a transmission line model of metallic CNT interconnects [13]. When compared with a two-dimensional fluid model, one-dimensional fluid model is accurate and takes into account electron-electron interaction. The Lüttinger Liquid Theory [19] models SWCNT as a one-dimensional conductor from quantum concept and takes into account electron-electron correlation. However, our model is simple in mathematical modeling and easier to extend in modeling of CNT bundles as interconnections. The basic equation is Euler’s equation, which is Newton’s Second Law applied in fluid dynamics and is given by [13]𝑚𝑛𝜕𝜕𝑡+𝑣^𝑧𝜕𝜕𝑧𝑣^𝑧=−𝜕𝑝𝜕𝑧−𝑒𝑛(1−𝛼)𝕰^z||_s′−𝑚𝑛𝑣𝑣^𝑧,(8) where 𝑛₀ is the equilibrium electron density, 𝑣_𝑧 is the electron mean velocity, 𝑝 is the pressure, m is the electron mass, e is the electronic charge, and ℰ_𝑧 is electric field. The second term on the right-hand side represents Lorentz force and includes electron-electron interaction through the parameter 𝛼. The last term on the right-hand side represents the effect of scattering of electrons with the positive charge background and υis the electron relaxation frequency, 𝜐=𝑣_𝐹/𝑙_mfp, where 𝑙_mfp is the mean-free path of electron in CNT and 𝑣_𝐹 is the Fermi velocity. Length of CNT is l and sgn(𝑙) is the sign function defined as follows: sgn(𝑙)=0if𝑙<𝑙^mfp1if𝑙≥𝑙_mfp,.(9) The parameter 𝛼 describes the classical electron-electron repulsive interaction given by [13] 𝛼≡𝕰^𝑧𝑃𝕰_𝑧=𝐸^𝑃𝐸=𝐸_𝐾𝐸+^𝑃𝐸_𝑃,(10) where ℰ_𝑧𝑃 is the part of the electrical field which provides potential energy to electrons in z direction. E is the total energy of electrons. 𝐸_𝑃 and 𝐸_𝐾 are the potential and kinetic energies of electrons, respectively.

Figure 3 

Geometry of a single-walled carbon nanotube (SWCNT).

The equation relating current density, charge density, and electric field can be described as follows [13]:𝜕𝑗(𝑧,𝑡)𝜕𝑡+𝜈𝑗+𝑢^2𝑒𝜕𝜎(𝑧,𝑡)𝜕𝑧=𝑒²𝑛₀𝑚(1+𝛼)𝕰^𝑧.(11)

We consider a metallic single-walled CNT above a perfect conducting plane and assume [12] that the propagating EM wave is in quasi-TEM mode [12]. The voltage and current intensity are then expressed as follows:𝑞𝑖((𝑧𝑧,,𝑡𝑡))==^⇀𝑗_⇀⋅^⇀𝑧𝑑𝑙≈2𝜋𝑟𝑗(𝑧,𝑡),𝜎⋅𝑑𝑙≈2𝜋𝑟𝜎(𝑧,𝑡).(12)

Combining (12) and (11), following equation is obtained as𝕰_𝑧=𝑅𝑖+𝐿_𝐾𝜕𝑖𝜕𝑡+𝐶1_𝑄𝜕𝑞𝜕𝑧,(13) where 𝑅≡𝐿_𝐾sgn(𝑙)𝜈 is the resistance per unit length of CNT, 𝐿_𝐾≡𝑚/[(1+𝛼)2𝜋𝑟𝑒²𝑛₀] is the kinetic inductance per unit length, 𝐶_𝑄≡1/𝐿_𝐾𝑢^2𝑒 is quantum capacitance per unit length, and𝑢_𝑒=𝑣_𝐹/√1−𝛼 is the thermodynamic speed of sound of the electron fluid under neutral environment.

The magnetic inductance and electric capacitance per unit length of a perfect conductor on a ground plane are given by [20]𝐿_𝑀=𝜇𝐶2𝜋cosh⁻¹ℎ𝑟≈2𝜇𝜋ln2ℎ𝑟_𝐸,=2𝜋𝜀cosh⁻¹(ℎ/𝑟)≈ln2(𝜋ℎ𝜀/𝑟),(14) where h is the distance of CNT to the ground plane. Equation (14) is accurate enough for ℎ>2𝑟.

4. SWCNT Bundle Interconnect Model

Carbon nanotube can also be fabricated in bundles. The spacing between nanotubes in the bundle is due to the van der Waals forces between the atoms in adjacent nanotubes [21]. One of the most critical challenges in realizing high-performance SWCNT interconnect is in controlling the proportion of metallic nanotubes in a bundle. Current SWCNT fabrication techniques cannot effectively control the chirality of the nanotubes in a bundle [22, 23]. Therefore, SWCNT bundles have metallic nanotubes that are randomly distributed within the bundle. Avouris et al. [22] and Liebau et al. [23] have shown that metallic nanotubes are distributed with a probability 𝛽=1/3 in a growth process. The proportion of metallic nanotubes can, however, be potentially increased using techniques introduced in [24, 25].

Figure 4 shows the cross-section of an SWCNT bundle. Since the van der Waals force between the carbon atoms in adjacent SWCNTs is negligible compared to covalent bond between carbon atoms in an SWCNT [26], the one-dimensional fluid model can be applied to each SWCNT in the bundle with modification.

Figure 4 

Cross-section of SWCNT bundle interconnect wire.

Considering one of the SWCNTs, assuming electrons in SWCNT will be only affected by the electrons in the adjacent metallic SWCNTs and semiconducting SWCNTs have no effect on the conductance of the bundle. To calculate the potential energy, we first consider the potential energy of each SWCNT and then move them to be adjacent to each other to compose for the SWCNT bundle. Average potential energy of electrons in a single SWCNT can be described by the following equation:𝐸_𝑃=6𝑒²2𝜋𝜀₀1𝑑+𝛽^Γ𝑖=116𝑒²2𝜋𝜀₀1𝑑_𝑏,(15) where d is diameter of CNT and 𝑑_𝑏=𝛿+𝑑 is the distance of the adjacent SWCNT shown in Figure 4. δis the spacing between the SWCNTs in the bundle corresponding to the van der Waals distance between graphene layers in graphite. Γ is the average number of SWCNTs neighboring an SWCNT. The number of SWCNTs neighboring the corner SWCNT is 2, the number of SWCNTs neighboring the edge SWCNT is 4, and the number of SWCNTs neighboring the inside SWCNT is 6. Therefore, Γ=[(6𝑁_𝑥𝑁_𝑦−4𝑁_𝑥−4𝑁_𝑦−2[𝑁_𝑦/2])/(𝑁_𝑥𝑁_𝑦−2[𝑁_𝑦/2])], where square brackets are the floor functions.

The kinetic energy of the electrons is described by𝐸_𝐾=4×12𝑚𝑣^2𝐹≈7eV.(16)

Therefore, electron-electron interaction parameter α for SWCNT bundle can be calculated using (10). Total number of metallic SWCNTs in a bundle can be described by 𝑁=𝛽(𝑁_𝑥𝑁_𝑦−[𝑁_𝑦/2]). Following the derivation of electric field and current charge relation in [13], we get the similar equation for the electric field as described below:𝕰_𝑧=𝑅𝑖+𝐿_𝐾𝜕𝑖𝜕𝑡+𝐶1_𝑄𝜕𝑞𝜕𝑧,(17) where 𝑅≡𝐿_𝐾sgn(𝑙)𝜈 is the resistance per unit length of an SWCNT in an SWCNT bundle.

In (17), 𝐿_𝐾≡𝜋ℏ/4𝑒²𝑣_𝐹 is the kinetic inductance per unit length of an SWCNT in a bundle and 𝐶_𝑄≡1/𝐿_𝐾𝑢^2𝑒 is the quantum capacitance per unit length of an SWCNT in a bundle. 𝑢_𝑒=𝑣_𝐹/√1−𝛼 is the thermodynamic speed of sound of the electron fluid under a neutral environment.

The SWCNTs at the bottom shield the upper SWCNTs from the ground plane. Therefore, the electric capacitance 𝐶_𝐸 does not exist in the upper SWCNTs. However, there exists electric capacitance per unit length 𝐶_𝑏 between the neighboring metallic SWCNTs and its value is given by [20]𝐶_𝑏=𝜋𝜀⁰ln𝑑_𝑏/𝑑+𝑑_𝑏/𝑑²−1.(18)

Figure 5 shows the equivalent circuit of an SWCNT bundle as an interconnect wire. 𝑁_𝑏=𝑁_𝑥 is the number of lowest level metallic SWCNTs, which shield upper levels SWCNTs from ground plane. 𝑁_𝑎=𝑁−𝑁_𝑏 is the number of upper levels metallic SWCNTs.

Figure 5 

Equivalent circuit of SWCNT bundle interconnect.

5. Result and Discussion

In a recent work [6], we have developed analytical CNT-FET models for I-V characteristics and verified them with the experimentally measured I-V characteristics. Table 1 summarizes some of the physical and electrical parameters of CNT-FETs and comparison with equivalent MOSFET parameters. CNT-FETs are described in [2, 6] and MOSFETs in [27, 28], respectively. It is noticed from Table 1 that the CNT-FET carries a higher current density compared with the equivalent bulk silicon and SOI MOSFETs. In the following, we have used our CNT-FET models [5–8] in studying the performance of a ring oscillator circuit and compared it with the measured performance.

Table 1 

A comparison of modeled and measured parameters of CNT-FETs and MOSFETs.

Figure 6(a) shows schematic of a five-stage ring oscillator circuit similar to one fabricated by Chen et al. [29]. Figure 6(b) shows the simulation result of the ring oscillator output waveform at 0.92 V supply voltage. Figure 6(c) shows the oscillation frequency with varying supply voltage. The modeled curve does not include the effect of channel length modulation. The experimental data are taken from the work of Chen et al. [29]. Modeled and experimental curves show that the frequency of the ring oscillator is about 70–80 MHz at 1.04 V supply voltage. The frequency is low because CNT-FETs in this ring oscillator are 600 nm long and there are parasitic capacitances associated with the metal wire in the ring oscillator. Shorter length of CNT-FETs will increase the oscillating frequency as shown in Figure 7.

(a)

(b)

(c)

Figure 6 

(a) Schematic of a 5-stage ring oscillator, (b) output waveform of ring oscillator, and (c) oscillating frequency versus supply voltage $V_{\text{DD}}.$ Dimensions of both the n- and p-types CNT-FETs are d = 2 nm and L = 600 nm.

Figure 7 

Oscillating frequency of a 5-stage ring oscillator versus length of the CNT-FETs.

SWCNT exhibits large contact resistance when used as an interconnect wire [30]. However, CNT bundle gives low contact resistance when used as the circuit interconnect wire [31, 32]. Contact resistance in a bundle, however, will depend on the number of SWCNTs being metallic. Utilizing the models of CNT interconnects, we have also studied the performance of CNT-FET circuit inverter pair with different kinds of interconnects including the copper (Cu). One of the advantages of CNT interconnect is its large mean-free path 𝑙_mfp, which is on the order of several micrometers (as compared to 40 nm for Cu at room temperature). It provides low resistivity and ballistic transport in short-length interconnects [33]. In this work, first we have simulated a CNT-FET inverter pair with 0.1 𝜇m Cu and SWCNT bundle as interconnect wires using Cadence/Spectre. We have utilized the process parameters from the 2016 node, 22 nm technology [34] and assumed a 22 nm width and 44 nm height of the SWCNT bundle. The spacing between nanotubes in the bundle is due to van der Waals forces between the atoms in adjacent nanotubes, which means that the spacing between adjacent SWCNTs is 0.34 nm. If we assume diameter of an SWCNT in a bundle is to be 1 nm, then there are nearly 500 SWCNTs in the 22 nm (width) × 44 nm (height) bundle following Figure 4.

Figure 8 shows input and output waveforms of a CNT-FET inverter pair using SWCNT bundle as an interconnect wire and comparison with the ideal interconnect (RC = 0) and Cu interconnect. Input signal is a 4 GHz square wave pulse. The average delay is 6 ps, which suggests that the CNT-FET inverter pair can respond up to 100 GHz input signal. The performance of SWCNT bundle as an interconnect wire (𝛽=1) is close to Cu interconnect. It is due to contact resistance and relatively larger capacitance in an SWCNT bundle. The average delays are smaller for 𝛽=1 than those for𝛽=1/3 for SWCNT bundle interconnect. It can be explained that there are more metallic SWCNTs in a bundle when βincreases.

Figure 8 

Input and output waveforms of a CNT-FET inverter pair with 0.1 $\mu$m length of different interconnect wires.

Local interconnects are often used for connecting nearby gates or devices with lengths of the order of micrometers. Therefore, these have the smallest cross-section and largest resistance per unit length compared to global interconnects.

Figure 9 shows output waveforms of a CNT-FET inverter pair using 10 𝜇m SWCNT bundle interconnect and the comparison with the ideal interconnect (RC = 0) and Cu interconnect wires. Input signal is a 15 MHz square wave pulse. The performance of SWCNT bundle (𝛽=1) interconnect is better than Cu interconnect. While the delay of SWCNT bundle (𝛽=1/3) interconnect is larger than the Cu interconnect due to contact resistance and relatively larger capacitance in an SWCNT bundle, the average delays are smaller when 𝛽=1 than 𝛽=1/3 for SWCNT bundle interconnect wires. It can also be explained that there are more metallic SWCNTs in a bundle when βincreases.

Figure 9 

Output waveforms of a CNT-FET inverter pair with 10$\hspace{0.17em}\mu$m length of different interconnect wires.

Global interconnects have larger cross-section and smaller resistivity. The lengths are of the order of hundred micrometers. Figure 10 shows output waveform of a CNT-FET inverter pair with 500 𝜇m SWCNT bundle interconnect and comparison with the ideal interconnect (RC = 0) and Cu interconnect wires. Here we have utilized the process parameters from the 2016 node, 22nm technology and assumed 33 nm width and 87 nm height of an SWCNT bundle [34]. It can be shown that there are nearly 1500 SWCNTs in the 33 nm (width) × 87 nm (height) bundle following Figure 4 assuming 1 nm diameter of an SWCNT. Input signal is a 2 MHz square wave pulse. The performance of SWCNT bundle (𝛽=1) interconnect is much better than the Cu interconnect. While the delay of SWCNT bundle (𝛽=1/3) interconnect is larger than the Cu interconnect, the average delays are smaller when 𝛽=1 than 𝛽=1/3 for SWCNT bundle interconnects. This explains further that there are more metallic SWCNTs in a bundle when βincreases.

Figure 10 

Output waveforms of a CNT-FET inverter pair with 500 $\mu$m length of different interconnect wires.

Our results show that the CNT-FET circuits can potentially operate up to 100 GHz. SWCNT bundle interconnect (𝛽=1) has better performance than the Cu interconnect contrary to bundle with 𝛽=1/3. This result also compares well with the work of Nieuwoudt and Massoud [35] showing that the SWCNT bundle interconnects have larger delay than Cu interconnects for 𝛽=1/3. The proportion of metallic nanotubes can be potentially increased using techniques introduced in [24, 25]; the delay of SWCNT bundle interconnect can be smaller than that of Cu interconnect when 𝛽 approaches 1. The SWCNT bundle interconnect can potentially replace Cu interconnect in future CNT-FET circuits.

6. Conclusion

In this paper, static and dynamic models of CNT-FETs are introduced and models for SWCNT bundle interconnects are presented based on one-dimensional fluid model of SWCNTs. These models have been used to study the behavior of CNT-FET circuits such as ring oscillator and inverter pair and compared with the corresponding experimental behavior. The applicability of SWCNT bundle as interconnect wires in future design of integrated circuits has been explored theoretically and compared with the Cu interconnect wires for 22 nm technology node. Simulation results suggest that SWCNT bundle interconnect (𝛽=1) can replace Cu interconnects as the technology scales down.

Acknowledgments

Authors acknowledge the support provided by the Louisiana Economic Development Assistantship (EDA) program to carry out the proposed research. Part of the work is also supported by NSF (2009)-PFUND-138 and United States Air Force Contract no. FA9401-08-P-0129. Part of this material is also based on research sponsored by Air Force Research Laboratory under agreement number FA9453-10-1-0002. The U.S. Government is authorized to reproduce and distribute reprints for Government purposes notwithstanding any copyright notation thereon.