Research Article

Implementation of Hardware-Accelerated Scalable Parallel Random Number Generators

Table 1

Data access patterns in odd-odd case {17, 5}.

ODD-ODD case {17, 5} Two random numbers every clock cycleOdd random numberEven random number

1stZ(17)=Z(12)×Z(0)Z(18)=Z(13)×Z(1)
2ndZ(19)=Z(14)×Z(2)Z(20)=Z(15)×Z(3)
3rdZ(21)=Z(16)×Z(4)Z(22)=Z(17)×Z(5)
4thZ(23)=Z(18)×Z(6)Z(24)=Z(19)×Z(7)