Advancement in Nanoscale CMOS Device Design En Route to Ultra-Low-Power Applications

<table>Contribution of different leakage components in NMOS devices at different technology generations [<a href="/journals/vlsi/2011/178516/#B30">14</a>].</table>

VLSI Design

fig9

Figure 9

Figure 9: Advancement in Nanoscale CMOS Device Design En Route to Ultra-Low-Power Applications 