Table 7: Scalability on Texas Instruments benchmarks. The “Latency” column represents maximum 1.2 V latencies. SPICE runs are counted in parenthesis.

# sinksCLR, psSkew, psLatency, psCap., pF, min

20013.472.124506.852.212.2 (21)
50014.842.174528.099.536.28 (20)
1 K17.533.138543.1162.312.5 (20)
2 K16.563.136543.9276.119.3 (15)
5 K23.203.853538.5591.199.6 (22)
10 K25.545.562538.01130352.8 (23)
20 K32.4710.46546.822431867 (35)
50 K31.528.774545.1524316027 (45)