Weighted Transition Based Reordering, Columnwise Bit Filling, and Difference Vector: A Power-Aware Test Data Compression Method

Table 5

Comparison of peak power for various test data processing methods.

ISCAS circuit	Minimum transition fill	0 Filling + XOR [30]	Run based bit fill maximum limit	HDR-CBF-DV	2-D Reordering	WTR-CBF-DV
s5378	11519	12085	12085	13327	11769	12822
s9234	14092	15395	15395	17828	16106	17169
s13207	94879	110129	110129	128638	95541	125392
s15850	70875	84360	84360	96084	98903	96452
s38417	437884	514716	514716	644262	633561	660096
s38584	481158	530464	530464	550037	532809	551602