VLSI Design

Research Article

Efficient Congestion Mitigation Using Congestion-Aware Steiner Trees and Network Coding Topologies

Figure 1

(a) The underlying routing graph with two source nodes 𝑠 1 , and 𝑠 2 and three terminals 𝑡 1 , 𝑡 2 , 𝑡 3 . (b) A rectilinear Steiner tree that connects source 𝑠 1 to all terminals. (c) Two rectilinear Steiner trees that connect sources 𝑠 1 and 𝑠 2 to all terminals. (d) A network coding solution.
892310.fig.001a
(a)
892310.fig.001b
(b)
892310.fig.001c
(c)
892310.fig.001d
(d)