Performance Analysis of High Speed Hybrid CMOS Full Adder Circuits for Low Voltage VLSI Design

Table 7

Area comparisons of the XOR-XNOR-based adders.

Designs	CMOS	TGA	10T	9T	Design 1	Design 2
Length (μm)	17.5	14	11.2	10.1	15.5	15.2
Width (μm)	7.1	9.6	6.3	8.2	5.15	6.6
Area (μm^2)	124.2	135	71	82.8	80	100.3