Research Article

Optimized Architecture Using a Novel Subexpression Elimination on Loeffler Algorithm for DCT-Based Image Compression

Table 6

Performance analysis of the 2D DCT design using Loeffler algorithm.

Constant multiplication designSliceMULT18x18SIOsPower dissipation (mW)Delay (ns)ACT (μs)EoC (nJ)

Xilinx-embedded multipliers (Block)9602017620.581.769311.344
Xilinx-embedded multipliers (LUT)1836066.424.022.065137.116
CSD142307422.391.925142.45
CSD-CSE104807619.941.714130.264
CSD-CSE and quantization 0