Design Space Exploration of Deeply Nested Loop 2D Filtering and 6 Level FSBM Algorithm Mapped onto Systolic Array

Table 7

Design space exploration of the FSBM for 𝑝=1.

Cadency	Operators,	Area	% use rate	Number of	FF	Latency
	stages			muxes
40	22, 2	88	100	48	336	60
50	8, 2	64	100	96	288	80
100	5, 2	40	60,90,; 10,10	160	224	120
			10,10
150	2, 1	16	60	128	144	140
200	2, 1	16	45	128	144	140