Redundant Logic Insertion and Latency Reduction in Self-Timed Adders

Table 1

Data representation via dual-rail and 1-of-4 encoding formats.

Single-rail inputs		Dual-rail encoded data		1-of-4 encoded data
𝐀	𝐁	(𝐀𝟏 𝐀𝟎)	(𝐁𝟏 𝐁𝟎)	𝐄𝟎	𝐄𝟏	𝐄𝟐	E3
0	0	(0 1)	(0 1)	0	0	0	1
0	1	(0 1)	(1 0)	0	0	1	0
1	0	(1 0)	(0 1)	0	1	0	0
1	1	(1 0)	(1 0)	1	0	0	0