Research Article
Enabling Fast ASIP Design Space Exploration: An FPGA-Based Runtime Reconfigurable Prototyper
Algorithm 1
Worst case configuration identification.
Input: A set of candidate ASIP configurations | Output: Worst Case Configuration (WCC) | ; | ; | ; | for each candidate configuration with do | ; with | for each issue slot of the configuration do | ; with | ; with | end | end |
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