Journals
Publish with us
Publishing partnerships
About us
Blog
VLSI Design
Table of Contents
Special Issues
VLSI Design
/
2012
/
Article
/
Tab 1
/
Research Article
Low-Complexity Hierarchical Mode Decision Algorithms Targeting VLSI Architecture Design for the H.264/AVC Video Encoder
Table 1
Comparison among SAD, SSD, and SATD.
SATD
versus
SAD
SSD
versus
SAD
PSNR (dB)
Bit rate (%)
Number of Sums (%)
PSNR (dB)
Bit rate (%)
Number of Sums (%)
+0.008
ā0.63
+361.29
+0.079
ā1.13
+348.39