Research Article
Digital Noise Generator Design Using Inverted 1D Tent Chaotic Map
Table 3
Hardware required by T-1D and IT-1D maps in a FPGA device.
| Logic utilization | Available | Utilization (IT-1D) | Utilization (T-1D) |
| Number of slice flip flops | 9,312 | 2,169 (23%) | 2,689 (28%) | Number of 4 input LUTS | 9,312 | 2,376 (25%) | 2,674 (28%) | Number of occupied slices | 4,656 | 1,853 (39%) | 2,146 (46%) | Total number of 4 inputs LUTS | 9,312 | 2,535 (27%) | 2,867 (30%) | Number used as logic | — | 2,313 | 2,575 | Number used as a route thru | — | 159 | 193 | Number used as shift register | — | 63 | 99 | Number of bonded IOBs | 232 | 15 (6%) | 194 (83%) | Number of MULT18X18SIOs | 20 | 16 (80%) | 16 (80%) | Average fan-out of nonclock nets | — | 2.43 | 2.60 | Number of RAMB16s | 20 | — | 1 (5%) |
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