Power Consumption Models for Decimation FIR Filters in Multistandard Receivers

<table>Evolution of <i>β</i> depending on coefficient wordlength for a fixed input size of 4 bits and fixed filter orders for the 65 nm technology.</table>

VLSI Design

fig7

Figure 7

Figure 7: Power Consumption Models for Decimation FIR Filters in Multistandard Receivers 