Design Space of Flexible Multigigabit LDPC Decoders

<table>Row-based decoder processing <svg height="11.175" id="M59" style="vertical-align:-0.0pt" version="1.1" viewbox="0 0 10.9375 11.175" width="10.9375" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
<g transform="matrix(.017,-0,0,-.017,.062,11.113)"><use xlink:href="#x1D443"></use></g>
</svg> CNs and <svg height="11.3125" id="M60" style="vertical-align:-0.1092pt" version="1.1" viewbox="0 0 14.9875 11.3125" width="14.9875" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
<g transform="matrix(.017,-0,0,-.017,.062,11.113)"><use xlink:href="#x1D441"></use></g>
</svg> VNs per cycle.</table>

VLSI Design

Design Space of Flexible Multigigabit LDPC Decoders

Figure 5