Adaptivity Support for MPSoCs Based on Process Migration in Polyhedral Process Networks

<table>M-JPEG process scheduling while migrating <svg height="15.25" id="M88" style="vertical-align:-3.276pt" version="1.1" viewbox="0 0 17.275 15.25" width="17.275" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
<g transform="matrix(.017,-0,0,-.017,.062,11.112)"><use xlink:href="#x1D443"></use></g>
<g transform="matrix(.012,-0,0,-.012,10.875,15.187)"><use xlink:href="#x32"></use></g>
</svg> using the proposed migration mechanism.</table>

VLSI Design

fig18

Figure 18

Figure 18: Adaptivity Support for MPSoCs Based on Process Migration in Polyhedral Process Networks 