Design of Low Power Multiplier with Energy Efficient Full Adder Using DPTAAL

Table 4

Energy consumption of DPTAAL full adder.

	Logic; designs	Frequency
		1 MHZ	10 MHZ	100 MHZ	200 MHZ	300 MHZ
Energy (fJ)	CMOS	75	75	75	75	75
	DPTAAL	5	5.4	7.5	12	17.2