Design Example of Useful Memory Latency for Developing a Hazard Preventive Pipeline High-Performance Embedded-Microprocessor

Table 4

The performance/area comparisons of the synthesis results.

Type	Clock
	19.00 MHz	26.00 MHz	29.00 MHz
Single	213.40 mW	282.14 mW	311.60 mW
16-cycle	258.21 mW	343.46 mW	380.00 mW
8-cycle (Method-2)	210.68 mW	278.42 mW	307.45 mW