A High-Speed and Low-Energy-Consumption Processor for SVD-MIMO-OFDM Systems

Table 7

Performance comparison.

	[4]	[5]	[6]	[10]	Proposed
Architecture	Custom	Custom	Custom	ASIP	ASIP
Data type	fixed point	fixed point	fixed point	floating point	floating point
Matrix size	4×4	4×4	4×4	4×4	4×4
CMOS process	90 nm	0.18 𝜇m	90 nm	90 nm	90 nm
Gate count	900 k	42.3 k	120 k	83.7 k	81.9 k
Clock frequency (MHz)	500	149	182	400	400
Throughput (matrices/s)	125 k	303 k	7 M	25 k	93 k
Calculation time (𝜇s/matrix)	8	3.3	0.14	40	10.8
Utilization efficiency (throughput/gate count)	0.15	7.16	59.52	0.29	1.13
Supported operations	SVD	SVD	SVD	SVD	SVD, MCD
Size of side information	Large	Large	Large	Large	Compressed