Table 1: Delay estimates for different adder schemes, assuming bits operands and bits blocks. “Total delay” refers to the worst-case completion time.

456789101112

CSA32Total delay31.729.328.127.427.228.029.129.430.8
3.73.63.53.43.43.33.23.23.2
9.211.012.814.716.518.219.821.623.4
2.72.62.62.52.42.42.42.42.4
64Total delay57.850.646.143.641.241.240.239.840.5
4.04.03.93.83.73.63.63.53.4
10.112.414.516.418.512.121.923.825.4
3.02.92.82.72.72.62.62.62.5

CLA/CSA32Total delay29.326.023.922.621.822.022.522.823.8
4.24.14.14.24.34.24.04.24.1
4.25.05.97.08.39.510.912.614.3
3.03.03.03.03.13.02.93.03.0
64Total delay56.749.044.141.038.237.536.736.436.7
4.44.54.64.64.84.74.85.04.8
4.45.26.27.38.69.911.413.114.8
3.23.23.33.23.43.43.43.53.4