LDPC Decoder with an Adaptive Wordwidth Datapath for Energy and BER Co-Optimization

<table>Power breakdown for Method 2: <i>Normal Mode</i> only, <i>Low Power Mode Mode</i> only, and adaptive mode (6 iterations with <i>Low Power Mode</i> and 9 iterations with <i>Normal Mode</i>).</table>

VLSI Design

fig10

Figure 10

Figure 10: LDPC Decoder with an Adaptive Wordwidth Datapath for Energy and BER Co-Optimization 