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VLSI Design
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Special Issues
VLSI Design
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2013
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Article
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Tab 3
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Research Article
Framework for Simulation of Heterogeneous MpSoC for Design Space Exploration
Table 3
Comparison of HWD and next available and random mapping algorithms (simulation: TS-9).
Mapping
Random
HWD
NXT AVLBL
AVG. ETIME
1417.46
1394.67
1382.5
AVG. UTL
0.48
0.59
0.59
AVG. THR
0.02
0.02
0.02
AVG. PRT
108
107
108
AVG. PWR
59950.3
57996.9
57005
AVG. BFR
5
4
6