Research Article
Performance Analysis of Modified Drain Gating Techniques for Low Power and High Speed Arithmetic Circuits
Table 1
Power and delay values of NAND gate, FA, and 8-bit RCA using various techniques.
|
Circuit techniques | NAND gate | FA | 8-bit RCA | Power (nW) | Delay (ps) | Power (nW) | Delay (ps) | Power (uW) | Delay (ps) |
| Standard CMOS | | | | | | | Drain gating | | | | | | | Power gating | | | | | | | DHPF | | | | | | | DFPH | | | | | | | HS-drain gating | | | | | | | HS-power gating | | | | | | | HS-DHPF | | | | | | | HS-DFPH | | | | | | |
|
|