Articles in Press [12 articles]

• Design of an All-Digital Synchronized Frequency Multiplier Based on a Dual-Loop (D/FLL) Architecture, Mohammed Alser and Maher Assaad
• AUTOMATIC GENERATION OF OPTIMIZED AND SYNTHESIZABLE HARDWARE IMPLEMENTATION FROM HIGH LEVEL DATAFLOW PROGRAMS, Khaled JERBI, Mickael Raulet, Olivier DEFORGES, and Mohamed Abid
• N-Point DCT VLSI Architecture for Emerging HEVC Standard, Ashfaq Ahmed, Muhammad Usman Shahid, and Ata ur Rehman
• Design Space Exploration Of Deeply Nested Loop 2-D Filtering And 4-D Fsbm Algorithm Mapped On To Systolic Array, B Bala Tripura Sundari
• FastRoute: An efficient and high-quality global router, Min Pan, Yue Xu, Yanheng Zhang, and Chris Chu
• A Systematic Methodology for Reliability Improvements on SoC-based Software Defined Radio Systems, Dionysios Diamantopoulos, Kostas Siozios, Sotiris Xydis, and Dimitrios Soudris
• Hardware Design Considerations for Edge-Accelerated Stereo Correspondence Algorithms, Christos Ttofis and Theocharis Theocharides
• Power Consumption Models for Decimation FIR Filters in Multistandard Receivers, Khaled Grati, Nadia Khouja, Bertrand Le Gal, and Adel Ghazel
• An Efficient Multi-Core SIMD Implementation for H.264/AVC Encoder, Paolo Lambruschini, Massimo Bariani, and Marco Raggio
• Optimized Architecture using a Novel Subexpression Elimination on Loeffler Algorithm for DCT-Based Image Compression, Maher Jridi, AL FALOU Ayman, and Pramod Kumar Meher
• Flexible LDPC decoder architectures, Muhammad Awais and Carlo Condo
• Design Space of Flexible Multi-Gigabit LDPC Decoders, Philipp Schläfer, Christian Weis, Norbert Wehn, and Matthias Alles