- About this Journal
- Abstracting and Indexing
- Aims and Scope
- Article Processing Charges
- Articles in Press
- Author Guidelines
- Bibliographic Information
- Citations to this Journal
- Contact Information
- Editorial Board
- Editorial Workflow
- Free eTOC Alerts
- Publication Ethics
- Reviewers Acknowledgment
- Submit a Manuscript
- Subscription Information
- Table of Contents
Data-Oriented VLSI System Design
Call for Papers
Growing amount of data leads to the design paradigm shift from isolated computations to well-connected computing, including connections to data stored in the closest L1 cache to data stored in the cloud. These changes demand VLSI designs to change from “computation oriented” to “data oriented”. The aim of this special issue is to provide an opportunity for academic researchers and industrial engineers to present their new methodologies, ideas, applications, and experience on designs that consider large data volume and its impact on data link, interconnects, system on chip (SoC), multicore and multithreaded systems, and interactions between data compression algorithms and their hardware designs. Potential topics include, but are not limited to:
- Data-oriented workload prediction and optimization at various IC design stages
- Data link and interconnect design challenges for multi-core and network-on-chip systems
- Design of mobile systems for smart data collection
- Reconfigurable architecture of structural designs and FPGAs considering large data volume
- Reconfigurable interconnect fabrics of many-core architectures targeting data communications on chip including both wired and wireless on chips
- System designs for data compression and compressive sensing
- High speed chip-to-chip communication designs
- Design chip-package interfaces that support large volume data communication
- Fast and robust communication topologies of multiprocessor systems
- 3D interconnect design and prediction, including TSV architecture and monolithic 3D stacking
- Emerging technologies, for example, new material-based designs that support large volume data communication
Before submission authors should carefully read over the journal's Author Guidelines, which are located at http://www.hindawi.com/journals/vlsi/guidelines/. Prospective authors should submit an electronic copy of their complete manuscript through the journal Manuscript Tracking System at http://mts.hindawi.com/submit/journals/vlsi/data/ according to the following timetable:
| Manuscript Due | Friday, 2 August 2013 |
| First Round of Reviews | Friday, 25 October 2013 |
| Publication Date | Friday, 20 December 2013 |
Lead Guest Editor
- Meiling Wang, Department of Electrical and Computer Engineering, The University of Arizona, Tucson, AZ 85721, USA
Guest Editors
- Baris Taskin, Department of Electrical and Computer Engineering, Drexel University, Philadelphia, PA 19104, USA
- Laleh Behjat, Department of Electrical and Computer Engineering, University of Calgary, 2500 University Drive NW, Calgary, AB, Canada T2N 1N4
- Sanghamitra S. Roy, BRIDGE Lab, Electrical and Computer Engineering, Utah State University, Logan, UT 84322, USA
- Dirk Stroobands, Department of Electronics and Information Systems, Ghent University, Sint-Pietersnieuwstraat 41, 9000 Ghent, Belgium