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VLSI Interconnection Networks
Guest Editor: Pradip K. Srimani- Guest Editor's Introduction, Pradip K. Srimani
Volume 2 (1995), Issue 4, Pages i-ii - Design of Components for a Low Cost Combining
Switch, Susan R. Dickey and Richard Kenner
Volume 2 (1995), Issue 4, Pages 287-303 - The STC104 Packet Routing Chip, Peter W. Thompson and Julian D. Lewis
Volume 2 (1995), Issue 4, Pages 305-314 - The Cost of Adaptivity and Virtual Lanes in a
Wormhole Router, Kazuhiro Aoyama and Andrew A. Chien
Volume 2 (1995), Issue 4, Pages 315-333 - Embeddings into Hyper Petersen Networks: Yet
Another Hypercube-Like Interconnection Topology, Sajal K. Das, Sabine Öhring, and Amit K. Banerjee
Volume 2 (1995), Issue 4, Pages 335-351 - Least Common Ancestor Networks, Isaac D. Scherson and Chi-Kai Chien
Volume 2 (1995), Issue 4, Pages 353-364 - Trade-Off Considerations in Designing Efficient VLSI
Feasible Interconnection Networks, S. Q. Zheng, B. Cong, and S. Bettayeb
Volume 2 (1995), Issue 4, Pages 365-374 - Designing Interconnection Networks for
Multi-level Packaging, M. T. Raghunath and Abhiram Ranade
Volume 2 (1995), Issue 4, Pages 375-388 - On Some Properties of the Star Graph, Ke Qiu and Selim G. Akl
Volume 2 (1995), Issue 4, Pages 389-396