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Advanced VLSI Architecture Design for Emerging Digital Systems

Call for Papers

With physical feature sizes in VLSI designs decreasing rapidly, existing efficient architecture designs need be reexamined. Advanced VLSI architecture designs are required to further reduce power consumption, compress chip area, and speed up operating frequency for high-performance integrated circuits. With time-to-market pressure and rising mask costs in the semiconductor industry, engineering change order (ECO) design methodology plays a main role in advanced chip design. Digital systems such as communication and multimedia applications demand advanced VLSI architecture design methodologies so that low power consumption, small area overhead, high speed, and low cost can be achieved.

This special issue is dedicated to aspects of VLSI architecture design and their applications. Special interest focuses on emerging digital systems. The authors working in this area are strongly encouraged to submit original research papers, as well as review articles. Potential topics include, but are not limited to:

  • Engineering change order (ECO) for VLSI design
  • Low power VLSI architecture design for digital systems
  • High speed VLSI architecture design for digital systems
  • Area efficient VLSI architectures for digital systems
  • Fault tolerance and error control for digital systems
  • Novel reconfigurable and programmable architectures for emerging digital systems
  • On-chip communication design for emerging digital systems

Before submission authors should carefully read over the journal’s Author Guidelines, which are located at http://www.hindawi.com/journals/vlsi/guidelines/. Prospective authors should submit an electronic copy of their complete manuscript through the journal Manuscript Tracking System at http://mts.hindawi.com/submit/journals/vlsi/avad/ according to the following timetable:

Manuscript DueFriday, 9 May 2014
First Round of ReviewsFriday, 1 August 2014
Publication DateFriday, 26 September 2014

Lead Guest Editor

  • Yu-Cheng Fan, Department of Electronic Engineering, National Taipei University of Technology, Taipei, Taiwan

Guest Editors

  • Qiaoyan Yu, Department of Electrical and Computer Engineering, University of New Hampshire, Durham, NH 03824, USA
  • Thomas Schumann, Department of Electrical Engineering and Information Technology, Hochschule Darmstadt/University of Applied Sciences, Darmstadt, Germany
  • Ying-Ren Chien, Department of Electrical Engineering, National Ilan University, Yilan, Taiwan
  • Chih-Cheng Lu, Division for Biomedical 8 Industrial IC Technology, Industrial Technology Research Institute, Hsinchu, Taiwan