Selected Papers from the Midwest Symposium on Circuits and Systems

• Selected Papers from the Midwest Symposium on Circuits and Systems, Gregory D. Peterson, Ethan Farquhar, and Benjamin Blalock
  Volume 2010 (2010), Article ID 538454, 2 pages
• Nonlinear Circuit Analysis via Perturbation Methods and Hardware Prototyping, K. Odame and P. E. Hasler
  Volume 2010 (2010), Article ID 687498, 8 pages
• Linearity Analysis on a Series-Split Capacitor Array for High-Speed SAR ADCs, Yan Zhu, U-Fat Chio, He-Gong Wei, Sai-Weng Sin, Seng-Pan U, and R. P. Martins
  Volume 2010 (2010), Article ID 706548, 8 pages
• Local Biasing and the Use of Nullator-Norator Pairs in Analog Circuits Designs, Reza Hashemian
  Volume 2010 (2010), Article ID 297083, 12 pages
• Error Immune Logic for Low-Power Probabilistic Computing, Bo Marr, Jason George, Brian Degnan, David V. Anderson, and Paul Hasler
  Volume 2010 (2010), Article ID 460312, 9 pages
• Dynamic CMOS Load Balancing and Path Oriented in Time Optimization Algorithms to Minimize Delay Uncertainties from Process Variations, Kumar Yelamarthi and Chien-In Henry Chen
  Volume 2010 (2010), Article ID 230783, 13 pages
• Post-CTS Delay Insertion, Jianchao Lu and Baris Taskin
  Volume 2010 (2010), Article ID 451809, 9 pages
• A Low-Power Digitally Controlled Oscillator for All Digital Phase-Locked Loops, Jun Zhao and Yong-Bin Kim
  Volume 2010 (2010), Article ID 946710, 11 pages
• FPGA Implementation of an Amplitude-Modulated Continuous-Wave Ultrasonic Ranger Using Restructured Phase-Locking Scheme, P. Sumathi and P. A. Janakiraman
  Volume 2010 (2010), Article ID 213043, 11 pages
• FPGA-Based Software Implementation of Series Harmonic Compensation for Single Phase Inverters, K. Selvajyothi and P. A. Janakiraman
  Volume 2010 (2010), Article ID 512312, 14 pages
• Evolvable Block-Based Neural Network Design for Applications in Dynamic Environments, Saumil G. Merchant and Gregory D. Peterson
  Volume 2010 (2010), Article ID 251210, 25 pages
• Implementation of Hardware-Accelerated Scalable Parallel Random Number Generators, JunKyu Lee, Gregory D. Peterson, Robert J. Harrison, and Robert J. Hinde
  Volume 2010 (2010), Article ID 930821, 11 pages
• A Pipelined and Parallel Architecture for Quantum Monte Carlo Simulations on FPGAs, Akila Gothandaraman, Gregory D. Peterson, G. Lee Warren, Robert J. Hinde, and Robert J. Harrison
  Volume 2010 (2010), Article ID 946486, 8 pages
• A SiGe BiCMOS Instrumentation Channel for Extreme Environment Applications, Chandradevi Ulaganathan, Neena Nambiar, Kimberly Cornett, Robert L. Greenwell, Jeremy A. Yager, Benjamin S. Prothro, Kevin Tham, Suheng Chen, Richard S. Broughton, Guoyuan Fu, Benjamin J. Blalock, Charles L. Britton Jr., M. Nance Ericson, H. Alan Mantooth, Mohammad M. Mojarradi, Richard W. Berger, and John D. Cressler
  Volume 2010 (2010), Article ID 156829, 12 pages
• Emerging Carbon Nanotube Electronic Circuits, Modeling, and Performance, Yao Xu, Ashok Srivastava, and Ashwani K. Sharma
  Volume 2010 (2010), Article ID 864165, 8 pages