CAD for Gigascale SoC Design and Verification Solutions

• CAD for Gigascale SoC Design and Verification Solutions, Shiyan Hu, Zhuo Li, and Yangdong Deng
  Volume 2011 (2011), Article ID 398390, 2 pages
• Wirelength Minimization in Partitioning and Floorplanning Using Evolutionary Algorithms, I. Hameem Shanavas and Ramaswamy Kannan Gnanamurthy
  Volume 2011 (2011), Article ID 896241, 9 pages
• Weighted Transition Based Reordering, Columnwise Bit Filling, and Difference Vector: A Power-Aware Test Data Compression Method, Usha Mehta, K. S. Dasgupta, and N. M. Devashrayee
  Volume 2011 (2011), Article ID 756561, 8 pages
• Efficient Resource Sharing Architecture for Multistandard Communication System, T. Suresh and K. L. Shunmuganathan
  Volume 2011 (2011), Article ID 328640, 9 pages
• Efficient Congestion Mitigation Using Congestion-Aware Steiner Trees and Network Coding Topologies, M. A. R. Chaudhry, Z. Asad, A. Sprintson, and J. Hu
  Volume 2011 (2011), Article ID 892310, 9 pages
• Finding the Energy Efficient Curve: Gate Sizing for Minimum Power under Delay Constraints, Yoni Aizik and Avinoam Kolodny
  Volume 2011 (2011), Article ID 845957, 13 pages
• SoC: A Real Platform for IP Reuse, IP Infringement, and IP Protection, Debasri Saha and Susmita Sur-Kolay
  Volume 2011 (2011), Article ID 731957, 10 pages
• The Impact of Statistical Leakage Models on Design Yield Estimation, Rouwaida Kanj, Rajiv Joshi, and Sani Nassif
  Volume 2011 (2011), Article ID 471903, 12 pages
• Shedding Physical Synthesis Area Bloat, Ying Zhou, Charles J. Alpert, Zhuo Li, Cliff Sze, and Louise H. Trevillyan
  Volume 2011 (2011), Article ID 503025, 10 pages
• Suitability of Various Low-Power Testing Techniques for IP Core-Based SoC: A Survey, Usha Mehta, Kankar Dasgupta, and Niranjan Devashrayee
  Volume 2011 (2011), Article ID 948926, 7 pages
• Buffer Planning for IP Placement Using Sliced-LFF, Ou He, Sheqin Dong, Jinian Bian, and Satoshi Goto
  Volume 2011 (2011), Article ID 530851, 10 pages