Volume 10 [32 articles]

Physical Design Automation in Deep Submicron [9 articles]

• Preface, Jun-Dong Cho
  Volume 10 (1999), Issue 1, Pages i-iii
• Accurate Interconnection Length Estimations for Predictions Early in the Design Cycle, Dirk Stroobandt and Jan Van Campenhout
  Volume 10 (1999), Issue 1, Pages 1-20
• Tuning Strategies for Global Interconnects in High-Performance Deep-Submicron ICs, Andrew B. Kahng, Sudhakar Muddu, and Egino Sarto
  Volume 10 (1999), Issue 1, Pages 21-34
• Logic Synthesis for a Regular Layout, Malgorzata Chrzanowska-Jeske, Yang Xu, and Marek Perkowski
  Volume 10 (1999), Issue 1, Pages 35-55
• Placement with Incomplete Data, Maogang Wang, Prithviraj Banerjee, and Majid Sarrafzadeh
  Volume 10 (1999), Issue 1, Pages 57-70
• Empirical Study of Block Placement by Cluster Refinement, Jin Xu, Pei-Ning Guo, and Chung-Kuan Cheng
  Volume 10 (1999), Issue 1, Pages 71-86
• Lower-Power and Min-Crosstalk Channel Routing for Deep-Submicron Layout Design, S. H. Nam, J. D. Cho, and D. Wagner
  Volume 10 (1999), Issue 1, Pages 87-97
• Analytical Engines are Unnecessary in Top-down Partitioning-based Placement, C. J. Alpert, A. E. Caldwell, T. F. Chan, D. J.-H. Huang, A. B. Kahng, I. L. Markov, and M. S. Moroz
  Volume 10 (1999), Issue 1, Pages 99-116
• Hierarchy Restructuring for Hierarchical LVS Comparison, Wonjong Kim and Hyunchul Shin
  Volume 10 (1999), Issue 1, Pages 117-125