Volume 12 [43 articles]

Low Power Architecture and Circuit Design Computer Aided Design [13 articles]

• Preface, Jun-Dong Cho
  Volume 12 (2001), Issue 3, Pages i-iv
• Low Power Digital Multimedia Telecommunication Designs, Koon-Shik Cho and Jun-Dong Cho
  Volume 12 (2001), Issue 3, Pages 301-315
• Low Power Design for ASIC Cores, Alvar Dean, David Garrett, Mircea R. Stan, and Sebastian Ventrone
  Volume 12 (2001), Issue 3, Pages 317-331
• CADRE: A Low-power, Low-EMI DSP Architecture for Digital Mobile Phones, Mike Lewis and Linda Brackenbury
  Volume 12 (2001), Issue 3, Pages 333-348
• Exploiting Data-dependencies in Ultra Low-power DSP Arithmetic, V. A. Bartlett and E. Grass
  Volume 12 (2001), Issue 3, Pages 349-363
• A Novel Low-power Shared Division and Square-root Architecture Using the GST Algorithm, Martin Kuhlmann and Keshab K. Parhi
  Volume 12 (2001), Issue 3, Pages 365-376
• A Regularly Structured Parallel Multiplier with Low-power Non-binary-logic Counter Circuits, Rong Lin
  Volume 12 (2001), Issue 3, Pages 377-390
• A Low Power FIR Filter Design for Image Processing, Jun Mo Jung and Jong-Wha Chong
  Volume 12 (2001), Issue 3, Pages 391-397
• On Mixed PTL/Static Logic for Low-power and High-speed Circuits, Geun Rae Cho and Tom Chen
  Volume 12 (2001), Issue 3, Pages 399-406
• A Low-Voltage Floating-Gate MOS Biquad, Esther O. Rodríguez-Villegas, Alberto Yúfera, and Adoración Rueda
  Volume 12 (2001), Issue 3, Pages 407-414
• Efficient Low Power/Low Swing Bus Design Architectures, Abdoul Rjoub and Odysseas Koufopavlou
  Volume 12 (2001), Issue 3, Pages 415-429
• Low Power Built-In Self-Test Schemes for Array and Booth Multipliers, D. Bakalist, X. Kavousianos, H. T. Vergos, D. Nikolos, and G. Ph. Alexiou
  Volume 12 (2001), Issue 3, Pages 431-448
• Simultaneous Switching Noise Minimization Technique Using Dual Layer Power Line Mutual Inductors, Yongha Lee, Jongho Choi, Gyu Moon, and Jeomkeun Kim
  Volume 12 (2001), Issue 3, Pages 449-455