Volume 12 [43 articles]

VLSI Testing [10 articles]

• Guest Editorial, Sunil R. Das
  Volume 12 (2001), Issue 4, Pages i-iii
• Defect Level Estimation for Pseudorandom Testing Using Stochastic Analysis, W. B. Jone, D. C. Huang, S. C. Chang, and S. R. Das
  Volume 12 (2001), Issue 4, Pages 457-474
• Efficient Test Application for Core-Based Systems Using Twisted-Ring Counters, Anshuman Chandra, Krishnendu Chakrabarty, and Mark C. Hansen
  Volume 12 (2001), Issue 4, Pages 475-486
• BIST-Based Fault Diagnosis in the Presence of Embedded Memories, Jacob Savir
  Volume 12 (2001), Issue 4, Pages 487-500
• Effect of Reverse Body Bias on Current Testing of 0.18 μm Gates, Xiaomei Liu, Prachi Sathe, and Samiha Mourad
  Volume 12 (2001), Issue 4, Pages 501-513
• Test Generators Need to be Modified to Handle CMOS Designs, Jacob Savir
  Volume 12 (2001), Issue 4, Pages 515-525
• A Fine Grain Configurable Logic Block for Self-checking FPGAs, P. K. Lala and A. Walker
  Volume 12 (2001), Issue 4, Pages 527-536
• Random Pattern Testability Enhancement by Circuit Rewiring, Shih-Chieh Chang, Kwen-Yo Chen, Ching-Hwa Cheng, Wen-Ben Jone, and Sunil R. Das
  Volume 12 (2001), Issue 4, Pages 537-549
• An Efficient Test Pattern Generation Scheme for an On Chip BIST, B. K. S. V. L. Varaprasad, L. M. Patnaik, H. S. Jamadagni, and V. K. Agrawal
  Volume 12 (2001), Issue 4, Pages 551-562
• BIST Analysis of an Embedded Memory Associated Logic, Jacob Savir
  Volume 12 (2001), Issue 4, Pages 563-578