Volume 14 [33 articles]
All | 1-10 | 11-20 | 21-30 | 31-33
- Relaxation and Clustering in a Local Search Framework: Application to Linear Placement, Sung-Woo Hur and John Lillis
Volume 14 (2002), Issue 2, Pages 143-154 - Testability Synthesis for Jumping Carry Adders, Chien-In Henry Chen and Mahesh Wagh
Volume 14 (2002), Issue 2, Pages 155-169 - COPAS: A New Algorithm for the Partial Input Encoding Problem, Manuel Martínez, María J. Avedillo, José M. Quintana, and José L. Huertas
Volume 14 (2002), Issue 2, Pages 171-181 - A Parallel Residue-to-binary Converter for the Moduli Set {2m−1,220m+1,221m+1,…,22km+1}, Wei Wang, M. N. S. Swamy, M. O. Ahmad, and Yuke Wang
Volume 14 (2002), Issue 2, Pages 183-191 - An Embedded Low Transistor Count 8-bit Analog-to-digital Converter Using a Binary Searching Method, Chua-Chin Wang, Ya-Hsin Hsueh, and Shao-Ku Huang
Volume 14 (2002), Issue 2, Pages 193-202 - Power Efficient Hierarchical Scheduling for DSP Transformations, P. K. Merakos, K. Masselos, and C. E. Goutis
Volume 14 (2002), Issue 2, Pages 203-217 - An Empirical Algorithm for Power Analysis in Deep Submicron Electronic Designs, May Huang, Raymond Kwok, and Shu-park Chan
Volume 14 (2002), Issue 2, Pages 219-227 - An Algorithm Visualization Tool on the Reconfigurable Mesh, Jacir L. Bordim, Tatsuya Hayashi, and Koji Nakano
Volume 14 (2002), Issue 3, Pages 239-248 - Design Methodology of a 32-bit Arithmetic Logic Unit with an Adaptive Leaf-cell Based Layout Technique, Kiseon Cho and Minkyu Song
Volume 14 (2002), Issue 3, Pages 249-258 - Boolean Matching Filters Based on Row and Column Weights of Reed–Muller Polarity Coefficient Matrix, Chip-Hong Chang and Bogdan J. Falkowski
Volume 14 (2002), Issue 3, Pages 259-271