Volume 14 [33 articles]

• Spectral Techniques and Decision Diagrams—Guest Editorial, Bogdan J. Falkowski
  Volume 14 (2002), Issue 1, Pages 1-3
• Spectral Transforms Calculation through Decision Diagrams, Radomir S. Stanković and Bogdan J. Falkowski
  Volume 14 (2002), Issue 1, Pages 5-12
• Generalized Inclusive Forms—New Canonical Reed-Muller Forms Including Minimum ESOPs, Malgorzata Chrzanowska-Jeske, Alan Mishchenko, and Marek Perkowski
  Volume 14 (2002), Issue 1, Pages 13-21
• Circuit Synthesis from Fibonacci Decision Diagrams, Radomir S. Stanković, Jaakko Astola, Milena Stanković, and Karen Egiazarian
  Volume 14 (2002), Issue 1, Pages 23-34
• Efficient Algorithms for Creation of Linearly-independent Decision Diagrams and their Mapping to Regular Layouts, Marek Perkowski, Bogdan Falkowski, Malgorzata Chrzanowska-Jeske, and Rolf Drechsler
  Volume 14 (2002), Issue 1, Pages 35-52
• Logic Circuit Equivalence Checking Using Haar Spectral Coefficients and Partial BDDs, M. A. Thornton, R. Drechsler, and W. Günther
  Volume 14 (2002), Issue 1, Pages 53-64
• Foundations for Applications of Gibbs Derivatives in Logic Design and VLSI, Radomir S. Stanković, Milena Stanković, and Reiner Creutzburg
  Volume 14 (2002), Issue 1, Pages 65-81
• Spectral Testing of Digital Circuits, Bogdan J. Falkowski
  Volume 14 (2002), Issue 1, Pages 83-105
• Term Trees in Application to an Effective and Efficient ATPG for AND–EXOR and AND–OR Circuits, Lech Jóźwiak, Aleksander Ślusarczyk, and Marek Perkowski
  Volume 14 (2002), Issue 1, Pages 107-122
• The Single Row Routing Problem Revisited: A Solution Based on Genetic Algorithms, Albert Y. Zomaya, Roger Karpin, and Stephan Olariu
  Volume 14 (2002), Issue 2, Pages 123-141
• Relaxation and Clustering in a Local Search Framework: Application to Linear Placement, Sung-Woo Hur and John Lillis
  Volume 14 (2002), Issue 2, Pages 143-154
• Testability Synthesis for Jumping Carry Adders, Chien-In Henry Chen and Mahesh Wagh
  Volume 14 (2002), Issue 2, Pages 155-169
• COPAS: A New Algorithm for the Partial Input Encoding Problem, Manuel Martínez, María J. Avedillo, José M. Quintana, and José L. Huertas
  Volume 14 (2002), Issue 2, Pages 171-181
• A Parallel Residue-to-binary Converter for the Moduli Set {2m−1,220m+1,221m+1,…,22km+1}, Wei Wang, M. N. S. Swamy, M. O. Ahmad, and Yuke Wang
  Volume 14 (2002), Issue 2, Pages 183-191
• An Embedded Low Transistor Count 8-bit Analog-to-digital Converter Using a Binary Searching Method, Chua-Chin Wang, Ya-Hsin Hsueh, and Shao-Ku Huang
  Volume 14 (2002), Issue 2, Pages 193-202
• Power Efficient Hierarchical Scheduling for DSP Transformations, P. K. Merakos, K. Masselos, and C. E. Goutis
  Volume 14 (2002), Issue 2, Pages 203-217
• An Empirical Algorithm for Power Analysis in Deep Submicron Electronic Designs, May Huang, Raymond Kwok, and Shu-park Chan
  Volume 14 (2002), Issue 2, Pages 219-227
• An Algorithm Visualization Tool on the Reconfigurable Mesh, Jacir L. Bordim, Tatsuya Hayashi, and Koji Nakano
  Volume 14 (2002), Issue 3, Pages 239-248
• Design Methodology of a 32-bit Arithmetic Logic Unit with an Adaptive Leaf-cell Based Layout Technique, Kiseon Cho and Minkyu Song
  Volume 14 (2002), Issue 3, Pages 249-258
• Boolean Matching Filters Based on Row and Column Weights of Reed–Muller Polarity Coefficient Matrix, Chip-Hong Chang and Bogdan J. Falkowski
  Volume 14 (2002), Issue 3, Pages 259-271
• Energy Minimization Under Area and Performance Constraints for Multimedia Applications Realized on Embedded Cores, N. D. Zervas, K. Masselos, Y. A. Karayiannis, and C. E. Goutis
  Volume 14 (2002), Issue 3, Pages 273-286
• Low-power Application-specific Parallel Array Multiplier Design for DSP Applications, Sangjin Hong, Suhwan Kim, and Wayne E. Stark
  Volume 14 (2002), Issue 3, Pages 287-298
• Maximizing Memory Data Reuse for Lower Power Motion Estimation, Bo-Sung Kim and Jun-Dong Cho
  Volume 14 (2002), Issue 3, Pages 299-305
• Identification of Disjoint Bi-decompositions in Boolean Functions through Walsh Spectrum, Bogdan J. Falkowski and Sudha Kannurao
  Volume 14 (2002), Issue 3, Pages 307-313
• A Fast ALU Design in CMOS for Low Voltage Operation, A. Srivastava and D. Govindarajan
  Volume 14 (2002), Issue 4, Pages 315-327
• A Novel, Automatic Quality Control Scheme for Real Time Image Transmission, S. Ramachandran and S. Srinivasan
  Volume 14 (2002), Issue 4, Pages 329-335
• Fast Inner Product Computation on Short Buses, R. Lin and S. Olariu
  Volume 14 (2002), Issue 4, Pages 337-347
• Design Procedure Based on VHDL Language Transformations, László Varga, Gábor Hosszú, and Ferenc Kovács
  Volume 14 (2002), Issue 4, Pages 349-354
• A Noise-shaping Accelerometer Interface Circuit for Two-chip Implementation, Tetsuya Kajita, Un-Ku Moon, and Gabor C. Temes
  Volume 14 (2002), Issue 4, Pages 355-361
• Word-serial Architectures for Filtering and Variable Rate Decimation, Eugene Grayver and Babak Daneshrad
  Volume 14 (2002), Issue 4, Pages 363-372
• Design of an Inter-plane Circuit for Clocked PLAs, Chua-Chin Wang, Ya-Hsin Hsueh, Yu-Tsun Chien, and Ying-Pei Chen
  Volume 14 (2002), Issue 4, Pages 373-381
• Improved Design of C2PL 3-2 Compressors for Inner Product Processing, Chua-Chin Wang, Po-Ming Lee, and Chenn-Jung Huang
  Volume 14 (2002), Issue 4, Pages 383-388
• A Fast Dynamic 64-bit Comparator with Small Transistor Count, Chua-Chin Wang, Ya-Hsin Hsueh, Hsin-Long Wu, and Chih-Feng Wu
  Volume 14 (2002), Issue 4, Pages 389-395