Volume 4 [33 articles]

Regular Issue Articles [10 articles]

• A Multi-Terminal Net Router for Field-Programmable Gate Arrays, Dinesh Bhatia and Amit Chowdhary
  Volume 4 (1996), Issue 1, Pages 1-10
• An O(NlogN) Algorithm for Region Definition Using Channels/Switchboxes and Ordering Assignment, Jin-Tai Yan and Pei-Yung Hsiao
  Volume 4 (1996), Issue 1, Pages 11-16
• Nearly Balanced Quad List Quad Tree -A Data Structure for VLSI Layout Systems, Pei-Yung Hsiao
  Volume 4 (1996), Issue 1, Pages 17-32
• Time- and Cost-Optimal Parallel Algorithms for the Dominance and Visibility Graphs, D. Bhagavathi, H. Gurla, S. Olariu, J. L. Schwing, and J. Zhang
  Volume 4 (1996), Issue 1, Pages 33-40
• An Efficient Algorithm for the Split K-Layer Circular Topological Via Minimization Problem, J. S. Huang and Y. H. Chin
  Volume 4 (1996), Issue 1, Pages 41-51
• Minimum-Cost Node-Disjoint Steiner Trees in Series-Parallel Networks, Sunil Chopra and Kalyan T. Talluri
  Volume 4 (1996), Issue 1, Pages 53-57
• Behavioral Simulation and Performance Evaluation of Multi-Processor Architectures, Ausif Mahmood
  Volume 4 (1996), Issue 1, Pages 59-68
• Integration of SPICE with TEK LV500 ASIC Design Verification System, A. Srivastava and S. R. Palavali
  Volume 4 (1996), Issue 1, Pages 69-74
• Design and Implementation of a Low Power Ternary Full Adder, A. Srivastava and K. Venkatapathy
  Volume 4 (1996), Issue 1, Pages 75-81
• Design of an ASIC Chip for Skeletonization of Graylevel Digital Images, B. Majumdar, V. V. Ramakrishna, P. S. Dey, and A. K. Majumdar
  Volume 4 (1996), Issue 1, Pages 83-90