Volume 4 [33 articles]

Hard Ware Accelerators for VLSI Design [6 articles]

• Hardware Accelerators for VLSI Design, Ausif Mahmood
  Volume 4 (1996), Issue 2, Pages i-ii
• An Evaluation of Parallel Synchronous and Conservative Asynchronous Logic-Level Simulations, Ausif Mahmood and William I. Baker
  Volume 4 (1996), Issue 2, Pages 91-105
• An Integrated Hardware Array for Very High Speed Logic Simulation, E. Scott Fehr, Stephen A. Szygenda, and Granville E. Ott
  Volume 4 (1996), Issue 2, Pages 107-118
• A Hardware Accelerator for Fault Simulation Utilizing a Reconfigurable Array Architecture, Sungho Kang, Youngmin Hur, and Stephen A. Szygenda
  Volume 4 (1996), Issue 2, Pages 119-133
• The Use of Field-Programmable Gate Arrays for the Hardware Acceleration of Design Automation Tasks, Neil J. Howard, Andrew M. Tyrrell, and Nigel M. Allinson
  Volume 4 (1996), Issue 2, Pages 135-139
• Hardware Design Rule Checker Using a CAM Architecture, Seokjin Kim and Ramalingam Sridhar
  Volume 4 (1996), Issue 2, Pages 141-147