Table of Contents
Advances in Artificial Neural Systems
Volume 2011, Article ID 189368, 9 pages
Research Article

An Optimal Implementation on FPGA of a Hopfield Neural Network

1TIMA Laboratory, 46 avenue Félix Viallet, 38031 Grenoble, France
2Department of Computer Engineering, University of Balamand, Tripoli, Lebanon
3Electrical and Electronics Department, Faculty of Engineering I, Lebanese University, El Arz Street, El Kobbe, Tripoli, Lebanon
4Lebanese French University of Technology and Applied Sciences, Tripoli, Lebanon

Received 3 March 2011; Revised 30 April 2011; Accepted 4 June 2011

Academic Editor: Paolo Del Giudice

Copyright © 2011 W. Mansour et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


The associative Hopfield memory is a form of recurrent Artificial Neural Network (ANN) that can be used in applications such as pattern recognition, noise removal, information retrieval, and combinatorial optimization problems. This paper presents the implementation of the Hopfield Neural Network (HNN) parallel architecture on a SRAM-based FPGA. The main advantage of the proposed implementation is its high performance and cost effectiveness: it requires multiplications and additions, whereas most others require multiplications and additions.