Advances in Electrical Engineering
Volume 2017, Article ID 5640926, 16 pages
https://doi.org/10.1155/2017/5640926
Novel Basic Block of Multilevel Inverter Using Reduced Number of On-State Switches and Cascaded Circuit Topology
1Department of Electrical Engineering, G. H. Raisoni College of Engineering, CRPF Gate No. 3, Hingna Road, Digdoh Hills, Nagpur, Maharashtra 440016, India
2Department of Electrical Engineering, Shri Ramdeobaba College of Engineering & Management, Ramdeo Tekdi, Gittikhadan, Katol Road, Nagpur 440013, India
Correspondence should be addressed to Sanjay Bodkhe; ude.cenkr@bsehkdob
Received 22 November 2016; Revised 7 March 2017; Accepted 21 March 2017; Published 18 April 2017
Academic Editor: George E. Tsekouras
Copyright © 2017 Aparna Prayag and Sanjay Bodkhe. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
How to Cite this Article
Aparna Prayag and Sanjay Bodkhe, “Novel Basic Block of Multilevel Inverter Using Reduced Number of On-State Switches and Cascaded Circuit Topology,” Advances in Electrical Engineering, vol. 2017, Article ID 5640926, 16 pages, 2017. https://doi.org/10.1155/2017/5640926.